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Technical Lead (ASIC)

DivTek Global Solutions Inc.

This is a Full-time position in Santa Clara, CA posted February 18, 2021.

Job Title ASIC Technical Lead Job Location Santa Clara, California Salary competitive salary, bonus and great benefits Job Type Full-Time About Company This is a full-time opening with our direct client a leader in Semi-conductors industry Looking for a ASIC Technical Lead with experience in Semiconductor industry Requirements Responsibilities 10+ years of professional experience Experience in ASIC Frontend and physical design Experience working with customers Hands-on experience with implementation EDA tools like GenDC, InnovICC2 and sign-off tools like VoltRedhawk, TempPrimeTime and ICV Ability to analyze and resolve physical design issues related to RTL, library or CAD tools and drive execution Experience with SDC generationvalidation, IO frame generation, hierarchical design planning, block timing budget generation, power-grid synthesis and low power implementation Good Understanding and expert handling of Verilog HDL based Netlists, Physical design libraries, Scripting (PerlTclPython Experience of integrating IPs like leading CPUs, PCIe, USB, Serdes, DDR in an ASIC physical design framework Functional understanding of clock domain crossings, LintCDC checks, SDF generation, and ability to support gate-level simulations is preferred. Demonstrated experience of the complete RTL2GDSII design flow with multiple tapeout experience in 28nm16nm7nm process technologies is preferred Will work with SIC customers to define die-size, floorplan, architectural exploration of timing feasibility, support IP handling from a physical design standpoint and help with integration of full-chip timing constraints Will work with IP vendors to review deliverables and ascertain feasibility for physical integration Will work to implement synthesis, place route, power estimation, static timing analysis and physical verification Will work to support DFT tasks, package design, board design and gate-level simulations Will work closely with customers and design teams to review chip specifications, chip architecture and feedback on all items that will impact physical design Will work on timely execution of ASIC projects with complete and accurate deliverables for customers at every stage of the project Will work to explore physical design tradeoffs for timingpowerarea and arrive at the optimum solution to supportmeet customerrsquos schedule Strong analytical and problem-solving skills Strong written, interpersonal and communication skills How To Apply If interested please apply through or send an email to jobs AT with jobid ‘DIV-TECHLSC’